AMD's Zen 7 'Grimlock' CPUs will reportedly utilize TSMC's 1.4nm 'A14' node and advanced packaging

The company is also looking to integrate Powertech's FOPLP advanced packaging technology into the Zen 7 architecture, along with next-gen 3D V-Cache.

AMD's Zen 7 'Grimlock' CPUs will reportedly utilize TSMC's 1.4nm 'A14' node and advanced packaging
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TL;DR: AMD is preparing its Zen 7 "Grimlock" processors on TSMC's 1.4nm A14 node, skipping intermediate nodes, with production expected around 2027-2028. The flagship CCD may feature 16 cores and up to 224MB L3 cache with 3D V-Cache, targeting a 15-25% IPC boost and AI acceleration.
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New information has surfaced about AMD's future Zen 7 architecture, and it is coming straight from Taiwanese supply chain sources. According to Commercial Times Taiwan, AMD has proactively begun preparations for its next-generation Zen 7 platform well ahead of schedule, and the process-node picture is now quite clear.

The Zen 7 Core Complex Die (CCD), internally codenamed "Grimlock," is reportedly set to be manufactured on TSMC's A14 process node, which represents the foundry's 1.4nm-class technology. As a refresher, AMD is currently ramping up production of its Zen 6 EPYC "Venice" processors on TSMC's 2nm node, meaning Zen 7 would be skipping over several intermediate nodes, including N2P, N2X, and A16, going straight to A14.

AMD's Zen 7 'Grimlock' CPUs will reportedly utilize TSMC's 1.4nm 'A14' node and advanced packaging 7

The production timeline also aligns with TSMC's plans for its Fab 25 P1 facility in Taichung, which is expected to enter trial production in 2027 before scaling to mass production in 2028. That puts Zen 7 on track for a late 2028 launch window, which also happens to be when Intel's own 14A node is expected to reach volume production. Intel's 14A node has been gaining traction recently, with Tesla and Apple already confirmed as customers. This makes the 2028 period a particularly competitive battleground for both companies.

On the packaging side, the report notes that AMD CEO Dr. Lisa Su personally visited Powertech Technology during a recent trip to Taiwan. Industry insiders believe this visit was connected to securing supply allocations for Powertech's FOPLP technology, which stands for Fan-Out Panel-Level Packaging. AMD is reportedly evaluating FOPLP as it looks to build increasingly complex chiplet configurations while also reducing its reliance on TSMC specifically for packaging services.

AMD's Zen 7 'Grimlock' CPUs will reportedly utilize TSMC's 1.4nm 'A14' node and advanced packaging 773

The motivation for that larger packaging footprint becomes clear when you look at the specs. Insider speculation from the report suggests that the flagship Grimlock CCD will carry 16 cores, and when paired with next-generation 3D V-Cache, a single CCD could reach up to 224MB of total L3 cache. For context, that is over 130% more L3 cache than what today's Ryzen 9000 X3D gaming CCDs offer.

Previous leaks from Moore's Law is Dead have also suggested AMD is targeting a 15 to 25% IPC uplift with Zen 7 over Zen 6, along with improved AI acceleration baked directly into the CCD. As always with leaks of this nature, these details should be treated with a healthy degree of caution until AMD officially confirms them. That said, it will be interesting to see what kind of efficiency gains AMD can squeeze out of the 1.4nm process compared to Intel's 14A node.

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News Source:ctee.com.tw

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Hassam is a veteran tech journalist and editor with over eight years of experience embedded in the consumer electronics industry. His obsession with hardware began with childhood experiments involving semiconductors, a curiosity that evolved into a career dedicated to deconstructing the complex silicon that powers our world. From benchmarking PC internals to stress-testing flagship CPUs and GPUs, Hassam specializes in translating high-level engineering into deep, unbiased insights for the enthusiast community.

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